View MC44353DTBNBSP_281673.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Order this document by MC44353/D
Advance Information
PLL Tuned UHF Audio/Video Modulator ICs for PAL, SECAM and NTSC TV Systems
MC44353 - Multi-Standard Modulator IC MC44354 - PAL/NTSC Modulator IC MC44355 - PAL/NTSC Modulator IC with MC44355 - Fixed Video Modulation Index
These modulator circuits are intended for use in VCRs, satellite receivers, set-top boxes, video games, etc. An on-chip high speed I2C compatible bus receiver is included and is used to set the channel, tuned by a PLL over the full range in the UHF bands. The modulator incorporates a sound subcarrier oscillator, using a second PLL to derive 4.5, 5.5, 6.0 and 6.5 MHz carrier frequencies, selectable by the bus. For the sound, either frequency modulation with pre-emphasis or amplitude modulation (MC44353 only) is possible. A control bit (MC44353 only) is used to select AM sound with positive RF modulation (system L). The level of the sound carrier with respect to the vision carrier and the modulation depth of both sound and vision may be adjusted by means of the bus. In addition, an on-chip video test pattern generator may be switched in with a 1.0 kHz audio test signal. * Channel 21 through 69 UHF Operation (471 MHz to 855 MHz)
MC44353 MC44354 MC44355
MULTI-STANDARD AND PAL/NTSC MODULATOR ICs
SEMICONDUCTOR TECHNICAL DATA
20 1
DTB SUFFIX PLASTIC PACKAGE CASE 948E (TSSOP-20)
* * * * * * * * * *
On-Chip Low Power Operational Amplifier for Direct Tuning Varactor Voltage Single-Ended Output for Low Cost and Ease of Interface Low External Component Count High Speed I2C Bus Compatible Programmable Video Modulation Depth (8 Steps of 2.5%) Programmable Picture/Sound Carriers Ratio and Audio Sensitivity (8 Steps of 1.0 dB) On-Chip Programmable Sound Subcarrier Oscillator (4.5 MHz to 6.5 MHz) On-Chip Video Test Pattern Generator with Sound Test Signal (1.0 kHz) VCC Standby Mode (Typ 500 A) Transient Output Inhibit During PLL Lock-Up at Power-On
20 1
DW SUFFIX PLASTIC PACKAGE CASE 751D (SO-20L)
PIN CONNECTIONS
Amp In Op Out VCCD Osc Gnd 1 2 3 4 5 6 7 8 9 20 Xtal 19 SDA 18 SCL 17 Mod Gnd 16 VCC Mod 15 RF Out 14 Mod Gnd 13 Video In 12 VCCA 11 Audio In (Top View)
ORDERING INFORMATION
Device MC44353DTB MC44353DW MC44354DTB MC44354DW MC44355DTB MC44355DW TA = -20 to +80C 20 80C Operating Temperature Range Package TSSOP-20 SO-20L TSSOP-20 SO-20L TSSOP-20 SO-20L
Osc Osc Osc Gnd Snd Fil Snd Tun
Pre-Em 10
This document contains information on a new product. Specifications and information herein are subject to change without notice.
(c) Motorola, Inc. 1998
Rev 0
MOTOROLA ANALOG IC DEVICE DATA
1
MC44353 MC44354 MC44355
Figure 1. MC44353 Simplified Block Diagram
VCCA 12 16 Peak White Clip 15 Video Modulator + Sound Mix Clamp MC44353 8 Mod Gnd SCL SDA 17 18 19 30 High Speed Bus Modulator Section PLL Section Xtal 20 Ref Osc Ref Divider /8 Prescaler 3 Phase Comp Bias 2 Op Out 1 Amp In Value 7 36 TA Tstg -20 to 80 -65 to 150 Unit V V C C TE1 Test Pattern Generator TE2 7.8 kHz 976 Hz UHF Osc and Drives 7 6 Osc 5 Osc 4 Osc Gnd 2 3 Phase/ Freq Comp Sound Osc + FM Mod 3 AM Mod 11 Audio Osc Gnd 10 Pre-Em Mod Gnd 14 Video In 13 Snd Fil 8 Snd Tun 9
VCC Mod Standby
RF Out
Prog Divider
12
Prog Divider 31.25 kHz
3 VCCD
MAXIMUM RATINGS (Note 1)
Rating Supply Voltage Operational Amplifier Output Voltage Operating Ambient Temperature Storage Temperature Symbol VCC
NOTES: 1. Maximum ratings are those values beyond which damage to the device may occur. For functional operation, voltages should be restricted to the Recommended Operating Conditions. 2. ESD data available upon request.
ELECTRICAL CHARACTERISTICS (Parameter Type: A-100% Tested, B-100% Correlation Tested, C-Characterized on
Samples. D-Design Parameter, VCC = 5.0 V, TA = 25C, Video input 1.0 Vpp, 10 step greyscale. Step 3 [typ. 80%] modulation depth for PAL; Step 5 [typ 90%] modulation for SECAM L; P/S ration Step 3 [typ 14.5 dB]. RF output into 75 load. Unless otherwise noted.) (Specifications only valid for envelope demodulation.) Characteristic Operating Supply Voltage Range Analog Section Supply Current (VCC = 5.0 V) Digital Section Supply Current (VCC = 5.0 V) Modulator O/P Section Supply Current (VCC = 5.0 V) Total Supply Current (VCC = 5.0 V) During Standby During Standby (with Data Retension: VCC Mod = 5.0V) Operational Amplifier Output Voltage (through Rpullup) Operational Amplifier Output Current (with Rpullup = 560 k Test Pattern Sync Pulse Width TE1 Symbol VCCA,VCCD, VCC Mod ICCA ICCD ICC Mod ICC VCC Mod ICC Mod Min 4.5 26 24 6.0 56 4.0 - - - 4.0 Typ 5.0 33 32 9.0 74 - 0.5 30 56 4.7 Max 5.5 39.5 39 11.5 90 5.5 1.0 35 100 5.6 Unit V mA mA mA mA V mA V A s Type D A A A A D B B B A
2
MOTOROLA ANALOG IC DEVICE DATA
MC44353 MC44354 MC44355
ELECTRICAL CHARACTERISTICS (continued) (Parameter Type: A-100% Tested, B-100% Correlation Tested, C-Characterized on Samples. D-Design Parameter, VCC = 5.0 V, TA = 25C, Video input 1.0 Vpp, 10 step greyscale. Step 3 [typ. 80%] modulation depth for PAL; Step 5 [typ 90%] modulation for SECAM L; P/S ration Step 3 [typ 14.5 dB]. RF output into 75 load. Unless otherwise noted.) (Specifications only valid for envelope demodulation.)
Characteristic UHF Comparator Pump Current (Note 1) Sound Comparator Pump Current (Note 2) Op-Amp Input Current Oscillator Stability - negative resistance Delay VCCA/D to VCC Mod Application (See Figure 2) VCCA/D & VCC Mod Duration for Standby Mode Function (See Figure 2) t_sup_del t_sup_min Symbol Min 2.0 2.0 - 1.0 0 30 Typ 4.0 3.8 - - - - Max 6.0 5.6 20 - - - Unit A A nA k ns ms Type A A A D D D
NOTES: 1. Current sources driven by the UHF phase comparactor, that are connected to Pin 1. 2. Current sources driven by the phase sound comparator, that are connected to Pin 8.
Figure 2. Initial Power-On and Standby Mode VCC Timing Diagram
t_sup_min 5.0 V
VCCA/D
0V
0V 5.0 V
VCCmod
0V
t_sup_del
time
For proper operation of internal reset functions, VCCA and VCCD (which must be applied simultaneously) may not be applied after VCCmod. Normally, all VCC lines will come up at the same time. However, due to the possibility of a Standby VCC to be applied to the VCCmod pin, care should be ensured that
VCCmod is not applied before VCCA and VCCD (which must be tied together). See the timing diagram and DATA RETENTION function description. Note that VCCA/D and VCCmod must be activated above 4.5 V for a least 30 msecs before the device can operate correctly in Standby Mode.
HIGH SPEED I2C COMPATIBLE BUS CHARACTERISTICS (Over Functional Temperature Range - VCC = 5.0 V)
Characteristic SDA/SCL Output Current at 0 V SDA/SCL Low Input Level SDA/SCL High Input Level SDA/SCL Input Current for Input Level from 0.4 V to 0.3 VCC SDA/SCL Input Level SDA/SCL Capacitance ACK Low Output Level (sinking 3.0 mA) ACK Low Output Level (sinking 15 mA) Ci Vil Vih Symbol Min - - 3.0 -5.0 0 - - - Typ - - - - - - 0.3 - Max 10 1.5 - 5.0 VCC + 0.3 10 1.0 1.5 Unit A V V A V pF V V Type A B B C D C A C
MOTOROLA ANALOG IC DEVICE DATA
3
MC44353 MC44354 MC44355
HIGH SPEED I2C COMPATIBLE BUS CHARACTERISTICS (continued) (Over Functional Temperature Range - VCC = 5.0 V)
Characteristic Bus Clock Frequency Bus Free Time Between Stop and Start Setup Time for Start Conditions Hold Time for Start Condition Data Setup Time Data Hold Time Setup Time for Stop Condition Hold time for Stop Condition Acknowledge Propagation Delay SDA Fall Time at 3.0 mA sink and 130 pF Load SDA Fall Time at 3.0 mA sink and 400 pF Load SDA/SCL Rise Time SCL Fall Time Pulse Width of Spikes Suppressed by the Input Filter Tsp Tbuf Tsu;sta Thd;sta Tsu;dat Thd;dat Tsu;sto Thd;sto Tack;low Symbol Min 0 200 500 500 0 0 500 500 - - - - - - Typ - - - - - - - - - - - - - - Max 800 - - - - - - - 300 50 80 300 300 50 Unit kHz ns ns ns ns ns ns ns ns ns ns ns ns ns Type C C C C C C C C C C C C C C
Figure 3. Timings Definition
Tbuf Stop Start Chip address
ACK
SDA
SCL
Tsu;sto Thd;sta Tsu;dat Thd;dat Tack:low
Start
Stop
SDA
SDA
SCL
Tsu;sta
SCL
Thd;sto
Figure 4. Levels Definition
VCC VIH Not Defined VIL 0V
4
MOTOROLA ANALOG IC DEVICE DATA
MC44353 MC44354 MC44355
High Speed I2C Compatible Bus Format
Bit 7 CA - Chip Address 1 1 0 0 1 0 1 Bit 0 0 ACK ACK
C0 - Low Order Bits C1 - High Order Bits
FL - Low Order Bits FM - High Order Bits
NOTES: 1. C0 and FL: Low Order Bits and C1 and FM: High Order Bits. 2. VDM0-2: Video Mod Depth control bits (for MC44355 VMD0-2 are Don't Care). 3. SFD0-1: Sound subcarrier frequency control bits. 4. TB0-2 and X1, X0: Test modes bits, see table entitled TEST MODES. 5. AMD0-2: Audio Modulation Sensitivity, see table entitled AUDIO MODULATION SENSITIVITY (for MC44355 AMD0-2 are Don't Care). 6. PSD0-2: Picture to Sound carrier ratio, see table entitled PICTURE to SOUND CARRIER RATIO (for MC44355 PSD0-1 are Don't Care). 7. SysL: System L enable (selects AM sound and positive video modulation, MC44353 only). 8. TPEN: Test pattern enable (picture and sound). 9. N0 to N11: UHF frequency programming bits, in steps of 250 kHz.
Figure 5. High Speed I2C Compatible bus data format
SCL 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 44 45
STA SDA
Chip Address ($CA) ACK
MOTOROLA ANALOG IC DEVICE DATA
EEEEEEEEEEEEEEEEEEEEEEE EEEEEEEEEEEEEEEEEEEEEEE EEEEEEEEEEEEEEEEEEEEEEE EEEEEEEEEEEEEEEEEEEEEEE
VMD2 1 VMD1 AMD2 VMD0 AMD1 SFD1 SFD0 TB2 TB1 TB0 ACK ACK AMD0 PSD2 PSD1 PSD0 SysL N5 0 N4 N3 N2 N1 N9 N0 N8 X1 X0 ACK ACK TPEN N11 N10 N7 N6 First Data Byte (C1 or FM) ACK Data ACK STO
5
MC44353 MC44354 MC44355
VIDEO CHARACTERISTICS
Characteristic Video Bandwidth Video Input Level Video Input Current Peak White Clip (Note 1) Video Input Impedance Video S/N See Note 2 Differential Phase Differentical Gain Luma/Sync ratio PAL Video Modulation Depth Step 3 SECAM Video Modulation Depth Step 5 (MC44353 Only) Programmable in 8 steps of 2.5% P bl i f 2 5% On line CCIR 310, worst from the first 4 steps out of 5 Input ratio 7.0:3.0 Figure 7 - 6.8/3.2 76 84.5 Figure 7 1.0 - 82 90.5 Figure 7 5 7.2/2.8 88 96.5 % % Measured at 1.0 kHz (at Pin 13) Test Conditions (0/-1.0 dB; ref 0 dB @ 100 kHz) Min 5 - - 108 - - Typ - 50 112 500/4 Figure 6 Max - 1.5 200 116 - Figure 6 Unit MHz VCVBS nA % k/pF dB % Type C D A B D C C C B B B
NOTES: 1. The circuit is equipped with a 'soft clip' function. The Video Modulation depth is measured for a 1.0 VCVBS input level, giving modulation depth MDA; then the same measurement is carried out for an input level of 1.5 VCVBS, giving modulation depth MDB. The Peak White Clip is defined as 100*(MDB)/(MBA). 2. The frequency dependent specifications are greatly influenced by the PCB layout in the application. These specifications have all been measured using a Motorola application layout and circuit similarly as shown in Figures 19 and 21. The reference number for ordering this evaluation board is MC44350EVK.
Figure 6. Video Signal to Noise
60 Typical Performance 8.0 6.0 4.0 Degrees 55 dB 2.0 0 -2.0 -4.0 -6.0 45 21 24 27 30 33 36 39 42 45 48 51 54 57 60 63 66 69 Channel Number
Figure 7. Differential Phase
Maximum Specification Limit
Typical Performance
Maximum Specification Limit 50
Minimum Specification Limit
-8.0 21 24 27 30 33 36 39 42 45 48 51 54 57 60 63 66 69 Channel Number
6
MOTOROLA ANALOG IC DEVICE DATA
MC44353 MC44354 MC44355
AUDIO CHARACTERISTICS
Characteristic Audio input level AM Step 3, (SECAM) fs = 6.5 MHz, (for 8 steps see Table 4 - MC44353 Only) Audio input level FM Step 3 fs = 5.5, 6.0 or 6.5 MHz, (for 8 steps see table 4 - MC44353/4 Only Audio input Level FM fs = 5.5, 6.0 or 6.5 MHz (MC44355 Only) Audio input level FM Step 3 fs = 4.5 MHz (NTSC), (for 8 steps see table 4 - MC44353/4 Only Audio input Level FM fs = 4.5 MHz (NTSC) (MC44355 Only) Audio input resistance Audio Frequency response Minimum Minimum Maximum Audio Distortion FM (THD only) Audio Distortion AM (THD only) Audio S/N with Sync Buzz FM Audio S/N with Sync Buzz AM Test Conditions for 85% AM modulation of sound subcarrier b i Min 240 Typ 290 Max 340 Unit mVrms Type B@ 6.5 MHz B@ 5.5 MHz B@ 5.5 MHz D
240 for / f +/- 40 kH d i i using kHz deviation i specified pre-emphasis circuit (FM), Audio frequency= 1.0 kHz
305
370
mVrms
155
195
235
mVrms
240 for 20 kHz deviation i f 20 kH d i i using specified p pre-emphasis circuit p p (FM), Audio frequency= 1.0 kHz at 15 kHz -3.0 dB; ref 1.0 kHz; using specified pre-emphasis circuit -1.5 dB; ref 1.0 kHz; using ; ; g specified pre-emphasis circuit @ 1.0 kHz; 100% mod (50 kHz No Video @ 1.0 kHz; 85% mod, No Video See Figure 8 Ref 1 khz; 85% mod; Video input EBU color bar 75%; Audio BW 40 Hz to 15 kHz - Weighing filter CCIR 468-2 Step 3 (typ 80%) PAL & Step 1 (typ 80%) SECAM Video Mod depth
305
370
mVrms
155 30 - - 15 - - - 45
195 50 - - - 0.4 1.5 Figure 8 50
235 75 40 60 - 2 2.5 Figure 8 -
mVrms k Hz Hz kHz % % dB dB
D B D D D C D C D
Sound/Picture ratio Step 3 (8 steps of 1.0 dB, see table P/S Ratio - MC44353/4 only) Sound/Picture ratio Step 5 (2 settings, see table P/S Ratio - MC44355 only)
NOTE:
11
14.5
18
dB
B
13
16.5
20
dB
B
1. The frequency dependent specifications are greatly influenced by the PCB layout in the application. These specifications have all been measured using a Motorola application layout and circuit similarly as shown in Figures 19 and 21. The reference number for ordering this evaluation board is MC44350EVK.
Figure 8. Audio Signal to Noise
60 Typical Performance
55 dB
Maximum Specification Limit 50
45 21 24 27 30 33 36 39 42 45 48 51 54 57 60 63 66 69 Channel Number
MOTOROLA ANALOG IC DEVICE DATA
7
MC44353 MC44354 MC44355
HIGH FREQUENCY CHARACTERISTICS
Characteristic RF Output Level Output Inhibit Attenuation UHF Oscillator Frequency Minimum UHF Oscillator Frequency Maximum Sound Subcarrier Harmonics (fp + n*fs) Second Harmonic of chroma subcarrier Chroma/Sound Intermodualtion: fp + (fsnd - fchr) FO (picture carrier) Spurious FO (picture carrier) Harmonics In band spurious (fo 5.0 MHz) F0 + F1 Intermodulation Product Test Conditions See Note 1 and Figure 9. See Note 1 and Figure 10. Using specified circuit Using specified circuit Ref Picture carrier Using red EBU bar Using red EBU bar See Note 1 and Figure 11. See Note 1 and Figure 12. No video or sound modulation FO = 599.25 MHz F1 = 200 MHZ (at 80 dBV F0 + F1 = 799.25 MHz Min Figure 9 Figure 10 - 860 - - - - - - - Typ Figure 9 Figure 10 - - -62 -71 -81 Figure 11 Figure 12 - - Max Figure 9 Figure 10 450 - -54 -60 -72 Figure 11 Figure 12 -75 -60 Unit dbV dB MHz MHz dBc dBc dBc dbV dbV dBc dBc Type B C D D Max: D Typ: C C C C C C D
NOTE:
1. The frequency dependent specifications are greatly influenced by the PCB layout in the application. These specifications have all been measured using a Motorola application layout and circuit similarly as shown in Figures 19 and 21. The reference number for ordering this evaluation board is MC44350EVK.
Figure 9. RF Output Level
86 Maximum Specification Limit 85 84 dB V 83 82 81 Minimum Specification Limit dB Typical Performance 60 55 50 45 40 65
Figure 10. RF Output Inhibit Attenuation
Typical Performance
Maximum Specification Limit
80 21 24 27 30 33 36 39 42 45 48 51 54 57 60 63 66 69 Channel Number
35 21 24 27 30 33 36 39 42 45 48 51 54 57 60 63 66 69 Channel Number
90 80 70 60 dB V 50 40 30 20 10 0 -10 -20 50
Figure 11. FO (Picture Carrier) Spurious
RF Output Level
85 80 75 70 dB V 65 60 55 50 45
Figure 12. FO (Picture Carrier) Harmonics
RF Output Level
Maximum Specification Limit
Maximum Specification Limit Typical Performance
Typical Performance 2FO 3FO
150 250 350 450 550 650 750 850 950 1050 1150 1250 Frequency MHz
40 450 650 850 1050 1250 1450 1650 1850 2050 2250 2450 2650 Frequency MHz
8
MOTOROLA ANALOG IC DEVICE DATA
MC44353 MC44354 MC44355
MODULATOR FUNCTIONAL DESCRIPTION
General The device has two main sections; a PLL section to synthesize the channel frequency of the UHF output and a modulator section which accepts audio and video inputs and modulates the UHF carrier with them. The channel frequency, sound and picture modulation index and sound/picture carrier ratio are all programmable by means of a high speed I2C compatible bus. An on-chip video test pattern generator with an audio test signal is also included. The MC44353 is designed to operate as a multi-standard modulator and can handle the systems B/G, D/K, H, I, L and N with the same external circuit components. The basic elements of the circuit are shown in Figure 1. The Bus Receiver The bus receiver operates I2C compatible bus data format. Additional information on the data format is given on page 5. The chip address (I2C bus) is: 1 1 0 0 1 0 1 0 (ACK) = $CA (hex). Each ninth data bit (bits 9, 18, 27, 36 and 45) is an ACK (acknowledge bit) during which the MCU sends a logic "1" and the Modulator circuit answers on the data line by pulling low. Besides the chip address the circuit needs 4 data bytes for operation. These bytes are defined in the section on control bits. The following sequences of data bytes are permitted: Example 1 Example 2 Example 3 Example 4 CA CA CA CA C1 FM C1 FM C0 FL C0 FL FM C1 FL C0
560 k Amp In Bias Op Out 240 k STATE 4: Normal operation with inverted charge polarity. 30 V
comparator output pin. The tuning voltage range is then from just above 0 V to VCC (5.0 V typical) and therefore not all channels can be synthesised without adjusting the circuit inductance. Control bits T0, T1 and T2 are used to control the operational state of the phase comparator. A truth table is shown in the control bits section. Figure 13. Output Configuration of the Phase Comparator
VCC
On/Off 4.0 A On/Off 4.0 A Amp In
Gnd
For the significance of the control bits the section on control and test bit assignments on pages 11 and 12 should be consulted. PLL SECTION The programmable divider The programmable divider's division ratio is controlled by the state of control bits N0 to N11. The division ratio is given by: N = 2048*N11+ 1024*N10 + . . . . + 4*N2 + 2*N1 + N0. Max. ratio = 4095 Min. ratio = 17. The prescaler The prescaler is a fixed divide by 8 and is permanently engaged. It has a pre-amplifier for high sensitivity and good decoupling from the RF section. The phase comparator The phase comparator has a current source/sink characteristic (charge pump, see Figure 13). The pump current is 4.0 A. In normal operation (State 4) the phase comparator pulls high if the UHF oscillator frequency is too high. An internal amplifier is provided to generate tuning voltages greater than 5.0 V while inverting the output. The phase comparator can also be programmed to work (in state 0) with the opposite charge pump polarity. In this case the phase comparator pulls low if the UHF frequency is too high. In this mode the amplifier is not required. The filter components may be connected directly to the phase
10 nF 4.7 nF 330 pF
STATE 0: Normal operations with non-inverted charge polarity. Amp In 10 nF 4.7 nF 240 k
The reference divider This divider divides by 128 resulting in a reference frequency of 31.25 kHz with a 4.0 MHz crystal. The UHF oscillator frequency may be synthesised in steps of 250 kHz. The 250 kHz steps are due to the presence of a divide by 8 prescaler prior to the programmable divider. The reference divider also generates the timing signals TE1 and TE2 for the on-chip test pattern generator and the audio test signal. The reference divider also provides the 7.8 kHz reference frequency for the Sound PLL.
MOTOROLA ANALOG IC DEVICE DATA
9
MC44353 MC44354 MC44355
Test Pattern Generator A simple test pattern is generated on the IC which can be switched in under bus control to permit a TV receiver to easily tune in to the modulator output. The pattern consists of two white vertical bars on a black background and a 976 Hz audio test signal. Figure 14. TPSG Typical Video Waveform maximum permissible modulation depth (50 kHz FM deviation, 85% AM depth), may be adjusted under bus control. UHF Oscillator The UHF oscillator is designed to operate over a range of 450 to 860 MHz. The oscillator drives an external LC tank circuit differentially, and is tuned by a varicap diode. The varicap tuning voltage, as described in an earlier section, is provided from an on chip operational amplifier and external filter arrangement which is controlled by the PLL Section of the chip. The UHF frequency thus generated is used by the modulator as the TV channel carrier frequency. Video Modulator and Sound Mixer This section of the circuit accepts as inputs: 1. composite video; 2. the selected sound subcarrier I2C frequency; 3. the UHF carrier frequency at the selected channel; 4. the test pattern generator waveform. Selection is made via the control bus between the composite video input and the on chip test pattern generator. The video and sound inter-carrier are used to amplitude modulate the UHF carrier. Negative modulation is used, except in the case of System L where positive modulation is used.In this part of the circuit, the video modulation depth and the sound to picture carrier ratio may be programmed under bus control. In system L mode the video modulation depth has the same range, but may extend to higher percentage values. RF O/P Buffer The TV signal generated in the video modulator and mixer section is fed to an emitter follower output stage, capable of driving a terminated line. This output is provided with a separate VCC pin in order to avoid large circulating currents on the IC. It can provide at the output typically 84 dBV of signal across a 75 load. Transient Output Inhibit To minimize the risk of interference to other channels while the UHF PLL is acquiring lock on the desired frequency at Power-on, the UHF output stages are turned off for each power-on from zero and from standby mode. There is a timeout of 263 ms until the output is enabled. This allows the PLL to settle on its programmed frequency. Care must be taken therefore in determining the loop filter components so that the loop transient does not exceed this delay. Data Retention The circuit contains 4 bytes of memory holding the last frequency and control bits information. The circuit can retain this information at power down if a suitable VCC is supplied. The Standby VCC of nominal 5.0 V must be applied to pin VCC Mod. The 5.0 V current in data retention is approximately 500 A. Note that the voltage source on this pin must be able to supply a much higher current in normal operation (typically 12 mA). The circuit will enter into Data Retention Mode when the VCCA pin voltage drops below approximately 3.0 V.
TE2
7/10
3/10 TE1 0 10 20 24 28 30 Time in S 40 44 50 60 64
MODULATOR SECTION Video Input-Clamp and Peak White Clip The modulator requires a composite video input with negative going sync pulses and a nominal level of 1.0 Vpp. This signal is ac coupled to the video input where the sync tip level is clamped. The video signal is then passed to a peak white clip circuit whose function is to soft clip the top of the video waveform if the amplitude from the sync tip to peak white goes too high. In this way over-modulation of the carrier by the video is avoided. Sound Subcarrier Modulator The sound modulator system consists of an FM modulator incorporating the sound subcarrier oscillator, and an AM modulator. The audio input signal is ac coupled into the amplifier which then drives the two types of modulator. In order to provide the accuracy needed for sound subcarrier frequencies, the sound oscillator consists of a phase/frequency locked loop. An external LC tank circuit is required, and the oscillator frequency is controlled by varicap tuning diodes. The resulting oscillator frequency is divided down by a divider whose ratio can be controlled via the bus. A phase/frequency comparator is then used to compare this frequency with a reference frequency (Fref 2), obtained from the main PLL Section. The resulting error voltage is used to control the varicap. To allow all tuning voltage to be derived from VCC, a hyper-abrupt type of tuning diode is required to cover the necessary capacitance range. If only a single sound subcarrier frequency is being used, for example for PAL only or NTSC, then a less abrupt varicap diode may be used. The sound phase frequency comparator also requires an external loop filter. The oscillator provides subcarrier frequencies of 4.5, 5.5, 6.0 and 6.5 MHz, selectable via the bus. For all applications except system L, the subcarrier is frequency modulated with the audio signal. For system L, amplitude modulation is employed. The level of audio at the input needed to give the
10
MOTOROLA ANALOG IC DEVICE DATA
MC44353 MC44354 MC44355
Test Modes Various test modes can be enabled, by means of bits TB0-2 and X0-1. These operate by assigning some internal signals on the UHF phase comparator output current sources as outlined in the following 2 tables. Table 1. Test Mode 1 Test Bits TB0 to TB2 are located in C0, bits 0 to 2:
TB2 0 0 0 0 1 1 1 1 TB1 0 0 1 1 0 0 1 1 TB0 0 1 0 1 0 1 0 1 State 0 1 2 3 4 5 6 7 Function See Table Test Mode 2 Normal Operation, But Test Pattern Geneartor Disabled Upper Source On, Lower Source Off Lower Source On, Upper Source Off Normal Operation with Inverted Charge Polarity VOLTS High Impedance Test Ref divider on Upper Source (Fref), Lower Source Off Test Progr. divider on Lower Source (Fout/2), Upper Source Off
Sound Section Test Modes The Sound PLL is tested in a similar fashion, and responds to States 6 and 7 by placing the output of the sound PLL programmable divider on the upper current source. Table 3. Sound Subcarrier Frequency
SFD1 0 0 1 1
NOTE:
SFD0 0 1 0 1
Sound Subcarrier Freq (MHz) 4.5 5.5 6.0 6.5
1. Bits SFD1-0 are located in C0 bits 4 and 3.
Figure 15. CCIR Test Line 330
*1.0 0.86 0.72 0.58 0.44 **0.3
40
Step 0
NOTE: Not to scale *100 IRE ** 1 IRE
1
2
3
45
Table 2. Test Mode 2 Bits X0 and X1 are located in FL, bits 0 and 1:
X1 0 X0 0 State 0a
Function
Normal Operation with Non-Inverted Charge Pump Polarity Normal Inverted Operation (same as mode 4), but Transient Output Inhibit Disabled. Normal Inverted Operation (same as mode 4), but Transient Output Inhibit Circuitry Forced (output disabled). Normal Inverted Operation (same as mode 4), but Transient Output Inhibit counter Sped up (64 times).
Figure 16. Noise Measurement/Weighting Filter
0
0
1
0b
Decibels
-4
Approximately Characteristic of Standard Independent Filter in conformity with CCIR Rec. 567
1
0
0c 0
a
-8
1
1
0d
-12
In normal operation, the phase comparator pulls high if the UHF frequency is too high, and pulls low when the UHF frequency is too low. This mode is used when the tuning voltage is generated by the internal inverting operational amplifier, so in this case mode 4 (100) must be used. Switching in mode 0d will reset the transient delay counter, which will time out at an accelerated rate of 64 times the normal rate.
-16 0 1 2 f 3 MHz 4 5
MOTOROLA ANALOG IC DEVICE DATA
11
MC44353 MC44354 MC44355
Table 4. Audio Modulation Sensitivity (Control Bits)
AMD2 0 0 0 0 1 1 1 1
NOTE:
AMD1 0 0 1 1 0 0 1 1
AMD0 0 1 0 1 0 1 0 1
Audio Input for FM PAL/NTSC (MC44353/4) 420 mVrms 375 mVrms 335 mVrms 300 mVrms 270 mVrms 240 mVrms 215 mVrms 190 mVrms
Audio Input for AM SECAM (MC44353 Only) 405 mVrms 365 mVrms 325 mVrms 290 mVrms 260 mVrms 230 mVrms 205 mVrms 185 mVrms
Audio Input for FM PAL/NTSC (MC44355 Only) Not Programmable Not Programmable Not Programmable Not Programmable Not Programmable Not Programmable Not Programmable 190 mVrms
1. Audio sensitivity bits AMD2-0 are located in C1 bits 6 to 4.
Table 5. Picture to Sound Carrier Ratio (Control Bits)
PSD2 0 0 0 0 1 1 1 1
NOTE:
PSD1 0 0 1 1 0 0 1 1
PSD0 0 1 0 1 0 1 0 1
P/S Carrier Ratio (MC44353/4) 11.5 dB 12.5 dB 13.5 dB 14.5 dB 15.5 dB 16.5 dB 17.5 dB 18.5 dB
P/S Carrier Ratio (MC44355 Only) Not Programmable 12.5 dB Not Programmable Not Programmable Not Programmable 16.5 dB Not Programmable Not Programmable
1. Picture to sound carriers ratio bits PSD2-0 are located in C1 bits 3 to 1.
Table 6. Video Modulation Depth (Control Bits)
VMD2 0 0 0 0 1 1 1 1 VMD1 0 0 1 1 0 0 1 1 VMD0 0 1 0 1 0 1 0 1 Video Mod Depth PAL (MC44353/4) 74.5% 77% 79.5% 82% 84.5% 87% 89.5% 92% Video Mod Depth SECAM (MC44353 Only) 78% 80.5% 83% 85.5% 88% 90.5% 93% 95.5% Video Mod Depth PAL (MC44355 Only) Not Programmable Not Programmable Not Programmable 82% Not Programmable Not Programmable Not Programmable Not Programmable
NOTES: 1. Video modulation depth bits VMD2-0 are located in C0 bits 7 to 5. 2. SECAM values are approximately 5% higher than PAL values.
12
MOTOROLA ANALOG IC DEVICE DATA
MC44353 MC44354 MC44355
Figure 17. Pin Circuit Schematic
2.0 k 16 Amp In Negative input of operation amplifier and phase detector charge pump output 20 V
10 k 1.5 k
100 5.0 V 20 Xtal Crystal oscillator (4.0 MHz)
VCC 96 k 50 Op Out 1 Operational amplifier output which provides the tuning voltage 20 V 20 V 1/2 VCC 96 k ACK 132 k 500 20 V 19 SDA Data input/output (I2C bus)
VCC VCCD 3 Digital circuit supply 5.0 V 5.0 V 96 k 1/2 VCC 96 k 20 V 132 k 500 18 SCL Clock input (I2C bus)
Osc Gnd 4 Oscillator Ground
5 17 Mod Gnd Bal Osc Balanced cross coupled oscillator terminals. L/C resonance circuit 6 72 15 RF Out RF output 490 Osc Gnd 7 Oscillator Ground VCCA VCCA
5.0 V 5.0 V
16 VCC Mod
14 Mod Gnd
Snd Fil 8 Phase/Freq. detector charge pump output
50 k 13 Video In Input for baseband video. Signal modulates the RF carrier.
1.0 p VCCA Snd Tun 9 Sound carrier oscillator L/C tuned circuit
5.0 V 5.0 V
12 VCCA Audio supply voltage
Pre-Em 10 Frequency selective filter to shape sound modulation depth. 24.5 k 24.5 k
Audio
11 Audio In Input for sound. Signal modulates the sound carrier.
MOTOROLA ANALOG IC DEVICE DATA
13
MC44353 MC44354 MC44355
Figure 18. Typical Application
30 V VCCT C22 0.1
R11 560 k C20 0.01
R10 240 k 1 Amp In C19 0.0047 2 Op Out 3 VCCD 4 Gnd 5 L1 6.8 nH (Note 3) Osc1 6 Osc2
MC44353 20 Xtal 19 SDA 18 SCL 17 Mod Gnd 16 VCC Mod 15 RF Out Mod Gnd Video 12 Snd Tun VCCA 11 Pre-Em R7 220 k C8 100 pF C9 220 pF Audio C1, 2 0.2 R1 1.0 k C3 0.01 C4 0.1 Audio In C5 14 0.001 13 Snd Filt Video In TV Out 75 1% R2 8 9 C7 10 f C6 0.1 R3 4.7 (Note 4) 5.0 V SCL 4.0 MHz Cx (Note 1) SDA High Speed Bus
C21 330 pF
R9 47 k
C17 0.001 (Note 2)
C18 0.1
D3 HVU202A
R8 47 k
C16 0.001 (Note 2) R6 33 k
7 Gnd
C14, 15 0.22
C13
0.022 R5 220 k HVUR17
C12 0.0022 R4 100 k HVUR17 C10 0.1 D1
10
D2 C11 (Note 5) L2 27 H(Note 4)
NOTES: 1. Cx depends on Crystal Load Capacitance, Crystal resistance < 200 . 2. Tubular 0603 1.0 nF capacitors. 3. L1 is a 2 turn air coil. 4. L2 and R3 are non-surface mount components. Note L2 quality factor should be high enough to keep the sound carrier at the typical level Q min @ 5.5 MHz = 43, Q min @ 6.0 MHz = 40, and Q min @ 6.5 MHz = 37. 5. C11 and L2 are selected to control the sound carrier center frequency and its tuning range. 6. D1 and D2 are hyper-abrupt varactor. Minimum capacitance ratio between 1.0 and 4.5 V is C1/C4.5 = 5.6 to cover the full frequncy range. (C @ 1.0 V = 50 pF min)
Modifications to the application layout (Figures 19 through 21) will have an effect on the overall application performances. The most sensitive areas are around the UHF
Oscillator and RF Output (Pins 4 to 7 and Pins 14 to 17) so care must be taken to reproduce a similar PCB layout in the final application.
14
MOTOROLA ANALOG IC DEVICE DATA
MC44353 MC44354 MC44355
Figure 19. PCB Layout for SO-20L (Top Layer)
VCCT Gnd VCC VCC Gnd SCL SDA Gnd
Scale 2:1
C10 C12 D1 C11 D2 R4 C8 R5 R6 C13 R7 C18 C9 C4 Cx C1 C2 C3 C5 C6 U1 R8 C16 L1 D3 R9 C17 C21 R11 C22 C7 C14 C15 C20 R10 C19
15 Pin D Connector
R2 P1 R1
MOTOROLA ANALOG IC DEVICE DATA
15
MC44353 MC44354 MC44355
Figure 20. PCB Layout for TSSOP-20 (Top Layer)
VCCT Gnd VCC VCC Gnd SCL SDA Gnd
Scale 2:1
C10 C12 D1 C11 D2 R4 C8 R5 R6 C13 R7 C9 C4 C6 C1 C2 C3 C5 Cx U1 C18 R8 C16 L1 D3 R9 C17 R11 C21 C22 C7 C14 C15 C20 R10 C19
15 Pin D Connector
R2 P1 R1
16
MOTOROLA ANALOG IC DEVICE DATA
MC44353 MC44354 MC44355
Figure 21. PCB Layout for SO-20L and TSSOP-20 used for Characterization (Bottom Layer)
Scale 2:1
MOTOROLA ANALOG IC DEVICE DATA
17
MC44353 MC44354 MC44355
OUTLINE DIMENSION
DTB SUFFIX PLASTIC PACKAGE CASE 948E-02 (TSSOP-20) ISSUE A
20X
K REF
M
0.15 (0.006) T U
S
0.10 (0.004)
TU
S
V
S
K K1
2X
B L
PIN 1 IDENT 1 10
J J1
-U-
SECTION N-N N
0.15 (0.006) T U
S
A -V- N F DETAIL E C D 0.100 (0.004) -T- SEATING
PLANE
G
H
DETAIL E DW SUFFIX PLASTIC PACKAGE CASE 751D-04 (SO-20WB) ISSUE E
-A-
20 11 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.150 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D F G J K M P R MILLIMETERS MIN MAX 12.65 12.95 7.40 7.60 2.35 2.65 0.35 0.49 0.50 0.90 1.27 BSC 0.25 0.32 0.10 0.25 0_ 7_ 10.05 10.55 0.25 0.75 INCHES MIN MAX 0.499 0.510 0.292 0.299 0.093 0.104 0.014 0.019 0.020 0.035 0.050 BSC 0.010 0.012 0.004 0.009 0_ 7_ 0.395 0.415 0.010 0.029
-B-
1 10
10X
P 0.010 (0.25)
M
B
M
20X
D
M
0.010 (0.25)
TA
S
B
J
S
F R C -T-
18X SEATING PLANE X 45 _
G
K
M
18
IIII IIII IIII
0.25 (0.010) M
L/2
20
11
NOTES: 1 DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION: MILLIMETER. 3 DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4 DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5 DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6 TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7 DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS MIN MAX 6.40 6.60 4.30 4.50 --- 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.27 0.37 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.252 0.260 0.169 0.177 --- 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.011 0.015 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_
-W-
DIM A B C D F G H J J1 K K1 L M
MOTOROLA ANALOG IC DEVICE DATA
MC44353 MC44354 MC44355
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
MOTOROLA ANALOG IC DEVICE DATA
19
MC44353 MC44354 MC44355
Mfax is a trademark of Motorola, Inc. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; P.O. Box 5405, Denver, Colorado 80217. 1-303-675-2140 or 1-800-441-2447 Customer Focus Center: 1-800-521-6274 MfaxTM: RMFAX0@email.sps.mot.com - TOUCHTONE 1-602-244-6609 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, Motorola Fax Back System - US & Canada ONLY 1-800-774-1848 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298 - http://sps.motorola.com/mfax/ HOME PAGE: http://motorola.com/sps/ JAPAN: Nippon Motorola Ltd.: SPD, Strategic Planning Office, 141, 4-32-1 Nishi-Gotanda, Shagawa-ku, Tokyo, Japan. 03-5487-8488
20
MOTOROLA ANALOG IC DEVICE DATA
MC44353/D

▲Up To Search▲

Price & Availability of MC44353DTBNBSP

	To Download MC44353DTBNBSP Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .